Heptaphasis

7 phase quadrature sine LFO for Eurorack

Based on Yusynth Quadrature VC-LFO (which seems to be an adaptation of a state variable filter)

Specs

Frequency range
19 Hz - 0.0007 Hz (24 min)
Output phases
0°, 45°, 90°, 135°, 180°, 225°, 270°
Amplitude
+-5V (10Vpp)
Power draw
+30mA, -27mA (depends on used LEDs)
Startup stabilisation
7 sec
PCB size
100x45.2mm

Please copy, modify and let me know about your results

 

Only 7 phases because I want it to be as small as possible (3HP)

The 8th phase (315°) can still be obtained by inverting the 4th output (135°).

Schematic


pcbway.com svg render:


actual pcbs:

BOM

mouser project (missing some items like main timing caps, LEDs, power connector and jack sockets)

C15, C18470nFmain integrator/timing caps, must be matched to within 1% or better. Lower value = faster oscillations. PCB has a 0805 footprint, but it turns out SMD caps don't work very well here (stability issues, also the resulting oscillation amplitude seems to be low), so these THTs are recommended (or better). Example of installation
C3, C4, C5, C6, C11, C14, C17, C19, C22, C230805 100nFpower filtration, value not critically important
C7, C8, C9, C10, C12, C13, C200805 1nFstabilisation caps, value not critically important, but higher values will introduce constant phase shift (1nF ~ 0.1ms, 10nF ~ 1ms with 100kΩ impedance) and filter out lower frequencies. Will work even if not installed.
C160805 22pF
C1, C2THT 10µF electrolytic2mm lead pitch, <5mm diameter, <10mm height. Power filtration: 10µF or more.
C240805 10µFHigher value=longer increased frequency at startup
C21leave emptydo not install
T8leave emptydo not install
T1, T2, T3, T4, T5, T6, T7SOT23 NPNled driver, for example BC847
T9SOT23 NPNeg. BC847
BCM857SOT-457-6 matched PNP pairfor example (the part is radially symmetrical)
IC1, IC3SOIC14 TL074op amp (beware the orientation!!! +V supply pin is closer to jack sockets)
IC2SOIC8 TL072op amp (beware the orientation!!! +V supply pin is closer to jack sockets)
IC4SOIC16 LM13700 or NJM13700OTA (beware the orientation!!! +V supply pin is closer to jack sockets)
R44, R45, R48, R500805 820Ω1%
R1, R4, R8, R12, R22, R28, R340805 1kΩOutput buffer protection
R520805 1.5kΩ
R32, R400805 2.2kΩ5%
R550805 10kΩ
R530805 22kΩLimits the temporarily increased startup frequency. With 18kΩ it will be higher, but there might be some waveform distortion
R360805 33kΩ5%
R46, R470805 47kΩ1%, higher value will lower the frequency range
R6, R150805 68kΩsumming resistors - value not too critical, but the pairs must be matched. The summing gain should be adjusted with TR2 and TR3 respectively
R16, R20
R10, R170805 68kΩfor inverting buffers - values not critical, but the pairs must be matched
R11, R14
R21, R23
R29, R330805 68kΩ1% matched
R490805 82kΩhigher value will restrict the frequency range
R25, R300805 100kΩprimary inverting buffers - values not critical, gain should be adjusted with TR1 and TR4
R540805 100kΩfrequency CV input impedance
R42, R430805 100kΩOTA linearization
R510805 220kΩ
R2, R5, R9, R18, R24, R31, R37, 0805 330kΩLED driver gate. Too low value will distort the output waveform
R560805 1MΩlower value will shorten the time the frequency is temporarily increased during startup
R270805 2.2MΩ5%
R39leave emptydo not install
R38leave emptydo not install
R3, R7, R13, R19, R26, R35, R410805 470Ω-3kΩLED current limiting, choose according to desired LED brightness. For example 2.2kΩ with these LEDs is still quite bright
TR1, TR2, TR3, TR4THT 100kΩcalibration trimpots. Vertical multiturn Y or W config
Z1, Z2SOD80 5.1v zener
D1, D2THT 1n5819polarity protection schottky, THT vertical installation recommended
F1, F20805 100mA PPTC polyfusefor example. Will work with 0805 10Ω resistors, but with weaker protection
7 LEDsselect R3, R7, R13, R19, R26, R35, R41 according to the LED brightness
8 jacksmono 3.5mm PJ302M7 of them with the switch/normalisation pin removed
1 potentiometerright angled Alpha 9mm 100kΩ linearThonk or Mouser, the closer to 100kΩ the better the frequency range
eurorack power connector2x5 pin headerShrouded angled header recommended. These have usually the opposite orientation so the pins have to be pulled out, turned and pushed back in so that the shroud tab/notch is facing the PCB

Calibration

  1. Adjust TR1 to obtain +-5V (10Vpp) amplitude on the first output (COS 0°)
  2. Adjust TR4 to obtain +-5V (10Vpp) amplitude on the third output (SIN 90°)
  3. Adjust TR2 to obtain a nice +-5V (10Vpp) sine-like waveform on the sixth output (225°)
  4. Adjust TR3 to obtain a nice +-5V (10Vpp) sine-like waveform on the fourth output (135°)

Circuit description

7 phases generation

and 90°
core state variable filter quadrature oscillator
180°
inversion of
270°
inversion of 90°
225°
inverted and attenuated sum of and 90°
45°
inversion of 225°
135°
inverted and attenuated sum of and 270°

Core


Yusynth quadrature LFO core: outputs a +-8.33V cosine and sine (90° phase shift). Additionally a small current is supplied to the OTA linearizing diode bias inputs (regulated by R42 and R43), significantly improving the sine waveshape.

With C15 = C18 = 470nF, R46 = R47 = 47kΩ, and R42 = R43 = 100kΩ the frequency range is 19Hz - 0.0008Hz (20min). The frequencies can be increased by decreasing C15, C18 or increasing R42, R43 (ie. decreasing the OTA linearization current). The frequency range can also slightly vary depending on the power source and how close the potentiometer is to 100kΩ. Component changes might result in slightly different amplitudes (can be corrected by calibration with the four trimpots) or even oscillation stability issues (more experimentation needed). Too high C16 will dampen higher frequency oscillations.

Startup frequency


The core circuit by itself takes several cycles to start oscillating and settle on a stable amplitude, at very low frequencies it might take even hours. This sub-circuit temporarily increases the frequency for a couple of seconds (by supplying more current to the OTA amp bias input) so that the amplitude settles much quicker (typically around 7 seconds).

C24 (10µF) and R56 regulate how long the transistor T9 will be opened to increase the oscillation frequency. The duration of increased frequency can be shortened by decreasing the C24 capacitance or decreasing the resistance of R56.

After powerdown the C24 capacitor remains charged for a while, so if the power is turned back on in a short while, this startup sub-circuit will not be as efficient and the frequency needs to be rised manually with the potentiometer to allow the oscillations to settle on the stable amplitude.

sin+cos sum


By adding the SIN + COS signals another SIN signal phase-shifted by PI/4 (45°) is obtained. This summing circuit is also an inverting buffer, so the result is additionally "phase-shifted" by another 180° The summed output signal is stronger by a factor of sqrt(2), so the trimpot should be used to dial a desired resulting amplitude (around 48kΩ when two 68kΩ summing resistors are used). The closer the input signals are to sine and cosine waveforms, the closer the output summed signal waveform will resemble the shape of the input waveforms. If the input signals are slightly distorted, the output summed waveform will look different from the inputs.


  github